Intern ASIC Engineering Intern
Sandisk is hiring a remote Intern ASIC Engineering Intern. The career level for this job opening is Entry Level and is accepting Irvine, CA based applicants remotely. Read complete job description before applying.
Sandisk
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IMPORTANT INFORMATION: Based on our experience, we anticipate that the application deadline will be THURSDAY, APRIL 3, 2025 at 11:59pm PST. We reserve the right to close the application process sooner if we hire an applicant before the deadline. If not able to fill before deadline, we will update the posting.
ESSENTIAL DUTIES AND RESPONSIBILITIES:
- Work with architecture team to define major block’s micro architecture specification, IP specification.
- Implement new IP or customize existing IP design.
- Work with verification team to complete test plan, IP verification and whole chip verification task.
Required:
- Current student pursuing a Master’s degree in Computer Engineering, Electrical Engineering or related field.
- Graduation date of May/June 2026
- Available to work a 12-week, full time internship during May/June - Aug/Sept 2025 in Irvine, CA.
Preferred Skills:
- Familiar with digital design, design verification, and gate-level simulation
- Strong logic design and verification background
- Familiar with Verilog or SystemVerilog
- Familiar with Perl, Make file, Unix Shell, TCL (a plus)