Full-Time Senior ASIC Development Engineer

• Design and develop ASIC architectures for LDPC applications based on specifications and requirements.
• Implement RTL coding using hardware description languages such as verilog and SystemVerilog.
• In depth knowledge of HW tools.
• Familiar with verification plans using UVM and SystemVerilog - Advantage.
• Collaborate with cross-functional teams including system architects, software engineers, and layout engineers to ensure successful ASIC integration.
• Conduct system-level simulations and feasibility studies to validate ASIC performance.
• Optimize designs for low power consumption and high reliability.
• Participate in design reviews and provide technical guidance to junior engineers.
• Document all phases of ASIC design and development for future reference and maintenance.
• Stay updated with the latest technologies and trends in ASIC design and LDPC algorithms.

• BSc degree in Electrical Engineering, Computer Engineering, or a related field.
• Minimum of 15 years of experience in ASIC design and development.
• Strong expertise in digital design and verification methodologies.
• Proficiency in hardware description languages (Verilog, SystemVerilog).
• Experience with EDA tools such as Cadence, Synopsys, and Mentor Graphics.
• Knowledge of LDPC algorithms and their implementation in ASICs.

• Excellent problem-solving skills and attention to detail.
• Strong communication and teamwork skills.

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